Robert

Johnson

// Real-time voltage divider calculator const voltageDivider = (Vin, R1, R2) => { const Vout = Vin * (R2 / (R1 + R2)); const current = Vin / (R1 + R2); return { Vout: Vout.toFixed(3), current_mA: (current * 1000).toFixed(2), power_mW: (Vin * current * 1000).toFixed(2) }; }; // LED current limiting resistor const ledResistor = (Vsupply, Vforward, Iforward_mA) => { return Math.ceil((Vsupply - Vforward) / (Iforward_mA / 1000)); }; console.log(voltageDivider(12, 10000, 4700)); // → { Vout: '3.887', current_mA: '0.82', power_mW: '9.89' } console.log(ledResistor(5, 2.1, 20)); // → 145 Ω — use a 150 Ω standard resistor

// Circuit node struct for resistor network analysis #include <iostream> #include <vector> struct Node { int id; double voltage; std::vector<int> connections; }; double powerDissipated(double V, double R) { return (V * V) / R; } int main() { double resistors[] = {100, 220, 470}; double supply = 12.0; for (double R : resistors) { std::cout << "R=" << R << "Ω P=" << powerDissipated(supply, R) << "W\n"; } return 0; } // R=100Ω P=1.44W // R=220Ω P=0.655W // R=470Ω P=0.306W

-- 4-bit ripple carry adder in JHDL -- Used in digital logic coursework at SIU-E LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY full_adder IS PORT ( A, B, Cin : IN STD_LOGIC; Sum, Cout : OUT STD_LOGIC ); END full_adder; ARCHITECTURE dataflow OF full_adder IS BEGIN Sum <= A XOR B XOR Cin; Cout <= (A AND B) OR (B AND Cin) OR (A AND Cin); END dataflow; -- Links into 4-bit ripple adder chain